Part Number MX29F080MC-70
A0~A19 Address Input
Q0~Q7 8 Data Inputs/Outputs



  • 1,048,576 x 8 byte mode only
  • Single power supply operation
    • 5.0V only operation for read, erase and program operation
  • Fast access time: 70/90/120ns
  • Low power consumption
    • 30mA maximum active current
    • 0.2uA typical standby current
  • Command register architecture
    • Byte Programming (7us typical)
    • Sector Erase of 16 equal sector with 64K-Byte each
  • Auto Erase (chip & sector) and Auto Program
    • Automatically erase any combination of sectors with Erase Suspend capability.
    • Automatically program and verify data at specified address
  • Erase suspend/Erase Resume
    • Suspends sector erase operation to read data from, or program data to, another sector that is not being erased, then resumes the erase.
  • Status Reply
    • Data polling & Toggle bit for detection of program and erase operation completion.
  • Ready/Busy (RY/BY)
    • Provides a hardware method of detecting program and erase operation completion.
  • Sector Group protect/chip unprotect for 5V/12V system.
  • Sector Group protection
    • Hardware protect method for each group which consists of two adjacent sectors
    • Temporary sector group unprotect allows code changes in previously locked sectors
  • 10,000 minimum erase/program cycles
  • Latch-up protected to 100mA from -1V to VCC+1V
  • Low VCC write inhibit is equal to or less than 3.2V
  • Package type:
    • 40-pin TSOP or 44-pin SOP
  • Compatibility with JEDEC standard
    • Pinout and software compatible with single-power supply Flash


The MX29F080 is a 8-mega bit Flash memory organized as 1024K bytes of 8 bits. MXIC's Flash memories offer the most cost-effective and reliable read/write non-volatile random access memory. The MX29F080 is packaged in 40-pin TSOP or 44-pin SOP. It is designed to be reprogrammed and erased in system or in standard EPROM programmers.

The standard MX29F080 offers access time as fast as 70ns, allowing operation of high-speed microprocessors without wait states. To eliminate bus contention, the MX29F080 has separate chip enable (CE) and output enable (OE ) controls.

MXIC's Flash memories augment EPROM functionality with in-circuit electrical erasure and programming. The MX29F080 uses a command register to manage this functionality. The command register allows for 100%

TTL level control inputs and fixed power supply levels during erase and programming, while maintaining maximum EPROM compatibility.

MXIC Flash technology reliably stores memory contents even after 10,000 erase and program cycles. The MXIC cell is designed to optimize the erase and program mechanisms. In addition, the combination of advanced tunnel oxide processing and low internal electric fields for erase and programming operations produces reliable cycling. The MX29F080 uses a 5.0V±10% VCC supply to perform the High Reliability Erase and auto Program/ Erase algorithms.

The highest degree of latch-up protection is achieved with MXIC's proprietary non-epi process. Latch-up protection is proved for stresses up to 100 milliamps on address and data pin from -1V to VCC + 1V.


The MX29F080 is byte programmable using the Automatic Programming algorithm. The Automatic Programming algorithm makes the external system do not need to have time out sequence nor to verify the data programmed. The typical chip programming time at room temperature of the MX29F080 is less than 8 seconds.


The entire chip is bulk erased using 10 ms erase pulses according to MXIC's Automatic Chip Erase algorithm. Typical erasure at room temperature is accomplished in less than 8 seconds. The Automatic Erase algorithm automatically programs the entire array prior to electrical erase. The timing and verification of electrical erase are controlled internally within the device.


The MX29F080 is sector(s) erasable using MXIC's Auto Sector Erase algorithm. Sector erase modes allow sectors of the array to be erased in one erase cycle. The Automatic Sector Erase algorithm automatically programs the specified sector(s) prior to electrical erase. The timing and verification of electrical erase are controlled internally within the device.


MXIC's Automatic Programming algorithm require the user to only write program set-up commands (including 2 unlock write cycle and A0H) and a program command (program data and address). The device automatically times the programming pulse width, provides the program verification, and counts the number of sequences. A status bit similar to DATA polling and a status bit toggling between consecutive read cycles, provide feedback to the user as to the status of the programming operation.


MXIC's Automatic Erase algorithm requires the user to write commands to the command register using standard microprocessor write timings.

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