|Manufacturer part number||LP2981AIM5-3.0|
|Operating junction temperature||−40 ~ 125°C|
|Power dissipation||Internally limited|
|Input supply voltage (survival)||-0.3 ~ 16V|
|Input supply voltage (operating)||2.1 ~ 16V|
|Shutdown input voltage (survival)||-0.3 ~ 16V|
|Output voltage (survival)||-0.3 ~ 9V|
|Input-output voltage (survival)||-0.3 ~ 16V|
|Storage temperature||-65 ~ 150°C|
The LP2981-N is a 100-mA, fixed-output voltage regulator designed specifically to meet the requirements of battery-powered applications.
Using an optimized Vertically Integrated PNP (VIP) process, the LP2981-N delivers unequaled performance in all specifications critical to batterypowered designs:
Dropout Voltage: Typically 200 mV at 100-mA load, and 7 mV at 1-mA load.
Ground Pin Current: Typically 600 μA at 100-mA load, and 80 μA at 1-mA load.
Sleep Mode: Less than 1-μA quiescent current when ON/OFF pin is pulled low.
Precision Output: 0.75% tolerance output voltages available (A grade).
Assorted voltage options, from 2.5 V to 5 V, are available as standard products.
The LP2981-N is a 100-mA, fixed-output voltage regulator designed specifically to meet the requirements of battery-powered applications. Available in assorted output voltages from 2.5 V to 5 V, the device has an output tolerance of 0.75% for the A grade (1.25% for the non-A version). Using a VIP process, the LP2981-N contains these features to facilitate battery-powered designs:
To meet the different application requirements, the LP2981-N provides multiple fixed output options from 2.5 V to 5 V.
With special careful design to minimize all contributions to the output voltage error, the LP2981-N distinguishes itself as a very high-accuracy output voltage micropower LDO. This includes a tight initial tolerance (0.75% typical), extremely good line regulation (0.007%/V typical), and a very low output voltage temperature coefficient, making the part an ideal low-power voltage reference.
Generally speaking, the dropout voltage often refers to the voltage difference between the input and output voltage (VDO = VIN – VOUT), where the main current pass-FET is fully on in the ohmic region of operation and is characterized by the classic RDS(ON) of the FET. VDO indirectly specifies a minimum input voltage above the nominal programmed output voltage at which the output voltage is expected to remain within its accuracy boundary.
LP2981-N uses a vertical PNP process which allows for quiescent currents that are considerably lower than those associated with traditional lateral PNP regulators, typically 600 μA at 100-mA load and 80 μA at 1-mA load.
When pulling the ON/OFF pin to low level, LP2981-N will enter sleep mode, and less than 1-μA quiescent current is consumed. This function is designed for the application which needs a sleep mode to effectively enhance battery life cycle.
The internal current-limit circuit is used to protect the LDO against high-load current faults or shorting events. The LDO is not designed to operate in a steady-state current limit. During a current-limit event, the LDO sources constant current. Therefore, the output voltage falls when load impedance decreases. If a current limit occurs and the resulting output voltage is low, excessive power may be dissipated across the LDO resulting in a thermal shutdown of the output. A foldback feature limits the short-circuit current to protect the regulator from damage under all load conditions. If OUT is forced below 0 V before EN goes high and the load current required exceeds the foldback current limit, the device may not start up correctly.
The LP2981-N contains a thermal shutdown protection circuit to turn off the output current when excessive heat is dissipated in the LDO. The thermal time-constant of the semiconductor die is fairly short