Part NumberST25RU3993-BQFT
Bit rate5Mbps
Clock high time70ns
Clock low time70ns
NCS setup time10ns
Data-in setup time10ns
Data-in hold time 10ns
NCS hold time Read / Write10ns
NCS hold time direct command70ns

UHF RFID single chip reader EPC Class1 Gen2 compatible


  • Supply voltage range 3.0 to 3.6 V
    • Limited operation possible down to 2.7 V
    • Maximum PA supply voltage 4.3 V
    • Peripheral I/O supply range 1.65 to 5.5 V
  • Protocol support for:
    • ISO 18000-6C (EPC Class1 Gen2)
    • ISO 29143 (Air interface for mobile RFID)
    • ISO 18000-6A/B through direct mode
  • DRM: 250 kHz and 320 kHz filters for M4 and M8
  • Integrated supply regulators
  • Frequency hopping support
  • ASK or PR-ASK modulation
  • Automatic I/Q selection
  • Phase bit for tag tracking with 8-bit linear RSSI
  • Temperature range: -40 °C to 85 °C
  • 48-pin QFN (7x7x0.9 mm) package


The ST25RU3993 is an EPC Class 1 Gen 2 RFID reader IC that implements all the relevant protocols, including ISO 18000-6C, the ISO 29143 air-interface protocol for mobile RFID interrogators, and ISO 18000-6A/B for operation in direct mode. It includes an on-chip VCO and a power amplifier, and offers a complete set of RFID features including Dense Reader Mode (DRM) functionality and support for frequencyhopping, low-level transmission coding, low-level decode, data framing and CRC checking.

The ST25RU3993 operates at very low-power, making it suitable for use in portable and batterypowered equipment such as mobile phones.

Packaged in a 7x7 mm QFN, the ST25RU3993 is able to deliver very high sensitivity and provides high immunity against the effects of antenna reflection and self-jamming. This is critical in mobile and embedded applications, in which antenna design is often compromised by cost or size constraints. High sensitivity enables the endproducts to achieve their required read range while using a simpler and cheaper antenna, thus reducing overall system cost.

Thanks to its high level of integration, the ST25RU3993 requires only an external 8-bit microcontroller to create a complete RFID reader system, thus eliminating the need for a complex RFID co-processor.


The ST25RU3993 device is ideally suited for:

  • Embedded consumer/industrial applications with cost constraints such as beverage dispensing
  • Hand-held readers
  • Mobile UHF RFID readers
  • Battery-powered stationary readers

Functional overview

The ST25RU3993 UHF reader device is an integrated analog front end and protocol handling system for UHF RFID readers. The chip works on 3.3 V supply voltage and is therefore perfectly suited for low voltage, low-power applications.

It supports operation on DRM link frequencies used in ETSI and FCC regions (see Section 2.9.4: Rx filter for supported link modes). It complies with EPC Class1 Gen2 protocol (ISO 18000-6C) in normal mode and ISO 18000-6A/B in direct mode.

The RFID reader device features complete analog and digital functionality for the reader operation, including transmitter and receiver section with full EPC Class1 Gen2 (ISO180006C) digital protocol support.

The reader is enabled by setting the EN pin of the device to a positive logic level. A four-wire serial peripheral interface (SPI) is used for communication between the host system (MCU) and the reader device. The MCU is notified to service an IRQ by a logic high level on the IRQ pin. The device configuration and fine tuning of the reader performance is achieved through direct access to all control registers. The baseband data is transferred via a dual 24-byte FIFO buffer register to and from the reader device. The transmission system comprises a parallel/serial data conversion, low level data encoding and automatic generation of FrameSync, Preamble, and cyclic redundancy check (CRC).

Two transmitter output ports are available:

  • One differential low-power, high linearity 0 dBm output that drives its power into a single ended 50 Ω load.
  • One differential high power output that is amplified by the internal PA. The high power output delivers up to 20 dBm and requires a single ended 50 Ω load.

Both outputs are capable of amplitude shift keying (ASK) or phase reversal amplitude shift keying (PR-ASK) shaped modulation. The integrated supply voltage regulators ensure supply ripple rejection of the complete reader system.

The receiver system ensures both AM and PM demodulation, and comprises a proprietary automatic gain control system.

Selectable gain stages and signal bandwidth cover a wide range of input link frequencies and bit rate options. The signal strength of AM and PM modulation is measured and can be accessed through the RSSI display register (2Bh). The receiver output is selectable between digitized sub-carrier signals and internal sub-carrier decoder output. The internal decoder output delivers a bit stream and a data clock.

The receiver system comprises a framing system for the baseband data. It performs a CRC check and organizes the data in bytes that are then accessible to the host system through a 24-byte FIFO register.

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